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Hardware-Assisted Secure Computation.

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Call No.	Ph.D. 2009 c.2
Author	Iliev, Alexander.
Title	Hardware-Assisted Secure Computation.
Date	2009
Abstract	The theory community has worked on Secure Multiparty Computation (SMC) for more than two decades, and has produced many protocols for many settings. One common thread in these works is that the protocols cannot use a Trusted Third Party (TTP), even though this is conceptually the simplest and most general solution. Thus, current protocols involve only the direct players—we call such protocols self-reliant. They often use blinded boolean circuits, which has several sources of overhead, some due to the circuit representation and some due to the blinding. However, secure coprocessors like the IBM 4758 have actual security properties similar to ideal TTPs. They also have little RAM and a slow CPU. We call such devices Tiny TTPs. The availability of real tiny TTPs opens the door for a different approach to SMC problems. One major challenge with this approach is how to execute large programs on large inputs using the small protected memory of a tiny TTP, while preserving the trust properties that an ideal TTP provides. In this thesis we have investigated the use of real TTPs to help with the solution of SMC problems. We start with the use of such TTPs to solve the Private Information Retrieval (PIR) problem, which is one important instance of SMC. Our implementation utilizes a 4758. The rest of the thesis is targeted at general SMC. Our SMC system, Faerieplay, moves some functionality into a tiny TTP, and thus avoids the blinded circuit overhead. Faerieplay consists of a compiler from high-level code to an arithmetic circuit with special gates for efficient indirect array access, and a virtual machine to execute this circuit on a tiny TTP while maintaining the typical SMC trust properties. We report on Faerieplay's security properties, the specification of its components, and our implementation and experiments. These include comparisons with the Fairplay circuit-based two-party system, and an implementation of the Dijkstra graph shortest path algorithm. We also provide an implementation of an oblivious RAM which supports similar tiny TTP-based SMC functionality but using a standard RAM program. Performance comparisons show Faerieplay's circuit approach to be considerably faster, at the expense of a more constrained programming environment when targeting a circuit.
Description	xxi, 232 leaves : ill. ; 28 cm
Format	application/pdf
Advisor	Sean W Smith Douglas McIlroy, Peter Winkler, Apu Kapadia
Subject	Computer networks -- Security measures. Computer networks -- Access control. Computer network protocols.
College	Dartmouth College. Dept. of Computer Science.
Issuing Body	Dartmouth Dissertations are made available through the Dartmouth Digital Library.
Degree	Thesis (Ph.D.)--Dartmouth College.
Copyright	All rights reserved. No part of this book may be reproduced in any form by any electronic or mechanical means without permission in writing from the author.
DOI	http://dx.doi.org/10.1349/ddlp.298

Title	Page 1
Format	application/pdf
Issuing Body	Dartmouth Dissertations are made available through the Dartmouth Digital Library.
Degree	Thesis (Ph.D.)--Dartmouth College.
Full Text	Hardware-Assisted Secure Computation A Thesis Submitted to the Faculty in partial fulfillment of the requirements for the degree of Doctor of Philosophy in Computer Science by Alexander Iliev DARTMOUTH COLLEGE Hanover, New Hampshire August 2009 Examining Committee: (chair) Sean W. Smith, Ph.D. M. Douglas McIlroy, Ph.D. Peter Winkler, Ph.D. Apu Kapadia, Ph.D. Brian W. Pogue, Ph.D. Dean of Graduate Studies

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Hardware-Assisted Secure Computation.